This invention relates to the field of power electronics. It relates to a method for operating a parallel circuit of semiconductor power switches in accordance to the preamble of the independent claim.
Such a method is disclosed in EP 0 409 384 A2. There, stationary partial currents are symmetrised with parallel switches, such as thyristors or GTOs (gate turn-off thyristors), by their turn-on times being individually shifted forward or backward. The necessary delay times are calculated in dependence of the momentary partial currents and applied to a subsequent total current pulse through the parallel circuit. Large inductors in series with the GTOs are arranged for limiting the current rise in the GTOs that are turned-on in a delayed manner. But this prolongs the turn-on times and increases the dynamic losses.
In EP 0 664 613 A2 transient and stationary currents through parallel IGBTs (“Insulated Gate Bipolar Transistor”) are symmetrised, on the one hand by snychronising the turn-on and turn-off times and, on the other hand, by regulating the height of the gate control pulses and thereby the stationary current amplitudes of each IGBT individually. The regulation is made in response to a measured thermal load of each IGBT. In this circuit large inductors in series can be avoided. Anyhow, an equalization of the stationary thermal loads of the IGBTs by means of current amplitude regulation is only possible with large time constants over many switching cycles and therefore comparatively inaccurate. Moreover the method is inapplicable to semiconductor power switches that can not be regulated by amplitude.